Hello, I'm the author of the Project F blog. I've almost finished a complete overhaul of this series: animation and double-buffering are coming in October.
Nice work :) I think implementing a VGA controller controller seems a lot nicer in Verilog/VHDL than on an MCU.
The Ti chip you're using for DVI looks interesting too, not heard of that before.
It looks like you're going to use the FPGAs BRAM for double buffering? I started implementing double buffering for led strips in VHDL, but need to get back to finishing the SPI controller for it.
I've also got designs that generate DVI on the FPGA with TMDS encoding (no external IC required). I've never polished or written them up, but you can see an example here:
I'm using BRAM for framebuffers as it allows me to focus on the graphics rather than memory controllers and access. BRAM gives you dual ports and true random I/O; DRAM is much more complex.
Thank you. I can't promise to get to the new design until early 2023 as I have many hardware designs I want to finish this year.
Once you've got a design working in Verilator, I strongly recommend running it on an actual board if you can: nothing beats the feeling of running on hardware :)
I'd be happy to field any questions you have.