Looking at AMD’s server strategy, hey are going directly at NVidia, nvidia just doesn’t know it yet. They Epyc line is built for heavy PCIe comma and low comms overhead from NIC to GPGPU. Of course, guess which gpgpu works best with them?
Also smart move for Intel. Frees them up to concentrate on CPU functionality and clean offloading to accelerators. This IMHO is the key, without something better than CAPI, CCIX, NVlink, then these are just accelerators. Putting them in as actual compute devices on same level as the CPU will take some actual guts and innovation.
It has been rumored for quite awhile. Chiplets from multiple vendors and on package memory (HBM) will be the way all future high end chips will be built. The key to getting this right is getting the handoff between devices at a systems level and extending the virtual memory fabric cleanly to these devices. The win for these is that you get the best hardware out there on A high bandwidth low latency substrate. AMD has better GPU hardware than Nvidia (Nvidia just has better drivers). Intel still has an edge on CPU physical implementation so, why not combine. I fully expect to see custom accelerators (TPU-like things in he near future) incorporated as well. If companies like IBM and Arm were smart they’ll be entering the space too, selling IP to put over EMIB. Suspect IBM is already there :), Arm probably not.
